RTL2PD Design Engineer (ASIC)

Bay Area, CA
Contracted
Mid Level

Hello,

Job Title : RTL2PD Design Engineer / RTL2PD Design Engineer (ASIC)

Client: Arrow Electronics

Experience Required: 8–12 years of hands-on experience

Pay Rate - $75/hr on W2 and $80/hr on C2C

Work Location: Bay Area, CA (Onsite)

Visa: All visa, except H1B transfer

C2C engagements are allowed.

RTL to Physical Design (RTL2PD) stage experience

MUST HAVE : RTL Synthesis, Constraint writing, validation, Static timing Analysis

What candidate will Be Doing:

RTL Synthesis, Constraint writing, validation, Static timing Analysis

Writing Scripts/Modiying scripts for RTL synthesis, SDC creation, STA

Debug synthesis issues and STA

Generate clean netlist.

What we are looking for:

Experience: 8–12 years of hands-on RTL Synthesis

EDA exposure: Design compiler, PrimeTime, Tempus, Genus,

Multi-Node Design: Experience working with 16nm, 7nm… etc nodes.

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